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Automatic test pattern generation
Results: 55

#	Item
41	White Paper Using TetraMAX® Physical Diagnostics for Advanced Yield Analysis Improving Defect Isolation with Layout Data January 2010 Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:31:30 Electronic design automation Automatic test pattern generation Integrated circuits Maintenance Electronic design Fault Failure analysis Semiconductor fault diagnostics Design for testing Electronic engineering Geology Design
42	Datasheet Yield Explorer Design-centric yield management Identify and eliminate Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:34:57 Electronic design automation Hillsboro Oregon Synopsys Physical design Yield Automatic test pattern generation Test engineer Electronic engineering Mechanics Physics
43	White Paper Synthesis-Based Test for Maximum RTL Designer Productivity November 2010 Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:32:21 Electronic design Integrated circuits Electronics manufacturing Automatic test pattern generation Design closure Test compression Physical design Scan chain Timing closure Electronic engineering Electronic design automation Electronics
44	Datasheet DFTMAX Ultra Compression for Highest Test Quality and Lowest Test Cost Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:32:25 Integrated circuits Electronic design Software testing Automatic test pattern generation Scan chain Code coverage Automatic test equipment Fault coverage Electronic engineering Electronics Electronic design automation
45	White Paper DFTMAX Compression Shared I/O Minimize the Cost of Testing ARM® Processor-based Designs and Other Multicore SoCs July 2013 Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-19 16:15:31 ARM architecture Microprocessors Automatic test pattern generation Multi-core processor Scan chain ARM Cortex-A15 MPCore Tegra Embedded system Central processing unit Electronic engineering Computer architecture Electronics
46	White Paper DFTMAX Ultra New Technology to Address Key Test Challenges September 2013 Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:32:17 Electronic design automation Electronic design Integrated circuits Scan chain Automatic test pattern generation Fault coverage Electronics manufacturing Test compression Design for testing Electronic engineering Electronics Design
47	White Paper Test Automation of 3D Integrated Systems January 2012 Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:41:47 Integrated circuits Semiconductor device fabrication Through-silicon via Software testing Electronic design Automatic test pattern generation Boundary scan Automatic test equipment Synopsys Electronic engineering Electronics Technology
48	Datasheet DFTMAX High Quality, Low Cost Test Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-03-20 14:15:36 Electronics manufacturing Electronic design Integrated circuits Automatic test pattern generation Test compression Scan chain Joint Test Action Group Boundary scan Physical design Electronic engineering Electronics Electronic design automation
49	Datasheet TetraMAX ATPG Automatic Test Pattern Generation Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-02-18 14:15:52 Integrated circuits Automatic test pattern generation Electronics manufacturing Electronic design Test compression Scan chain Iddq testing Joint Test Action Group Synopsys Electronic engineering Electronics Electronic design automation
50	IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING Received 30 April 2013; revised 6 October 2013; accepted 22 December[removed]Date of publication 5 February 2014; date of current version 7 May 2014. Add to Reading List Source URL: www.computer.org Language: English - Date: 2014-06-16 15:59:17 Manufacturing Joint Test Action Group Boundary scan Scan chain Test compression Automatic test pattern generation Block cipher Man-in-the-middle attack Side channel attack Electronic engineering Electronics Electronics manufacturing

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